| 摘要 |
The present invention relates to a semiconductor memory device wherein the layout of a fuse box used to control a memory cell array is improved, a fuse box is divided into a plurality of blocks, and an index mark is applied to every fuse box or to every block so that a user may recognize each fuse box. In an embodiment, there is provided a semiconductor memory device comprising a plurality of cell matrices and a fuse box. The plurality of cell matrices are arranged adjacently each other. The fuse box is defined by a fuse barrier layer formed at a side of the plurality of cell matrices, wherein the fuse box comprises a plurality of fuses shared by the plurality of cell matrices, and the fuse barrier layer is configured to have a length long enough to be shared by the plurality of cell matrices.
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