| 摘要 |
PURPOSE: A method for forming a dual damascene pattern of a semiconductor device is provided to prevent damage of lower metal lines and sidewall fence in a trench by forming a dummy via hole on a lower interlayer dielectric. CONSTITUTION: A semiconductor substrate(501) defined by a conductive region and an isolation region is prepared. An interlayer dielectric(505) is formed on the resultant structure. By selectively etching the interlayer dielectric, a via hole(507a) is formed in the interlayer dielectric of the conductive region, and a dummy via hole(507b) is simultaneously formed in the interlayer dielectric of the isolation region. Then, a trench(509) is formed, thereby forming a dual damascene pattern(510).
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