发明名称 Methods and systems for run-time scheduling database operations that are executed in hardware
摘要 Embodiments of the present invention provide a run-time scheduler that schedules tasks for database queries on one or more execution resources in a dataflow fashion. In some embodiments, the run-time scheduler may comprise a task manager, a memory manager, and hardware resource manager. When a query is received by a host database management system, a query plan is created for that query. The query plan splits a query into various fragments. These fragments are further compiled into a directed acyclic graph of tasks. Unlike conventional scheduling, the dependency arc in the directed acyclic graph is based on page resources. Tasks may comprise machine code that may be executed by hardware to perform portions of the query. These tasks may also be performed in software or relate to I/O.
申请公布号 US9424315(B2) 申请公布日期 2016.08.23
申请号 US200812099076 申请日期 2008.04.07
申请人 Teradata US, Inc. 发明人 Chamdani Joseph I.;Beck Alan;Boinepelli Hareesh;Crowley Jim;Krishnamurthy Ravi;Branscome Jeremy
分类号 G06F17/30;G06F9/48 主分类号 G06F17/30
代理机构 Monument IP Law Group 代理人 Monument IP Law Group
主权项 1. A method for scheduling database tasks for a relational query, said method comprising: receiving at least a portion of a query execution plan comprising a set of fragments with respective tasks having corresponding database virtual address ranges; mapping the database virtual address ranges to a set of memory pages; requesting respective locks for the set of memory pages; locking memory pages for the selected tasks; marking one or more of the tasks as being ready for execution based on whether locks have been granted for all of the memory page requests; and scheduling one or more tasks for execution in a dataflow architecture hardware accelerator coupled to the memory pages when locks have been obtained for all of its memory pages, wherein execution of the one or more tasks is based on execution of machine code instructions formatted for the dataflow architecture hardware accelerator and specifying a dataflow of data through the dataflow architecture hardware accelerator.
地址 Dayton OH US