| 摘要 |
PURPOSE: A double-edge-triggered flip-flop circuit is provided to stabilize the high-speed operation of the flip-flop circuit by using small number of flip-flops used in the flip-flop circuit. CONSTITUTION: A double-edge-triggered flip-flop circuit includes an input node, an output node, a controller, a first latch, and a second latch. The input node(D) and output node(Q) receive input and output signals, respectively. The controller(120) generates a first control signal synchronized with a clock signal and a second control signal complementary to the first control signal. The first latch(100) latches the input signal and outputs the latched input signal in response to the first and second control signals during the clock signal is at a first voltage level. The second latch(110) latches the input signal and outputs the latched input signal during the clock signal is at a second voltage level. The second latch is deactivated when the clock signal is at the first voltage level and the first latch is deactivated when the clock signal is at the second voltage level.
|
