发明名称 TRAP CIRCUIT AND FRONT END MODULE
摘要 <p><P>PROBLEM TO BE SOLVED: To improve isolation between ports of a front end module without enlarging an insertion loss. <P>SOLUTION: A front end module 1 is provided with an antenna port 2 to which an antenna is connected, receiving signal ports 3, 5, 7, transmitting signal ports 4, 6, a switching circuit 8 for switching a signal port to be connected to the antenna port 2, and a trap circuit 60. The trap circuit 60 is disposed to connect a signal route 61 between the receiving signal port 7 and the switching circuit 8, and a ground. The trap circuit 60 includes a diode 62 and a capacitor 63 which are serially connected. A control signal is applied to an anode of the diode 62 via an inductor 65. While the diode 62 is conducted, a serial resonance circuit is composed of an inductance component of the diode 62 and the capacitor 63. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2004312572(A) 申请公布日期 2004.11.04
申请号 JP20030105982 申请日期 2003.04.10
申请人 TDK CORP 发明人 HARA MASAKI;TADANO HIROSHI
分类号 H01P1/15;H04B1/44;H04B1/50;(IPC1-7):H04B1/44 主分类号 H01P1/15
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