发明名称 ADD-COMPARE-SELECT DEVICE OF VITERBI DECODER, ESPECIALLY USING AN EXTRA ONE BIT TO PREVENT OVERFLOW
摘要 PURPOSE: An add-compare-select(ACS) device of Viterbi decoder is provided to overcome the overflow generated due to the difference between the smallest matrix value and the largest matrix value by using an extra one bit. CONSTITUTION: An add-compare-select(ACS) device of Viterbi decoder includes a first adder(41), a second adder(42), a logic unit, a comparator(44) and a first to a fourth multiplexers(44-48). The first adder outputs the carry and the sum by adding the new branch matrix value to the accumulated previous matrix value. The second adder outputs the carry and the sum by adding the new branch value and the accumulated previous matrix value. The comparator compares the carry output of the first adder with the carry output of the second adder. The first multiplexer selectively outputs the sum output of the first adder and the value subtracting a predetermined value from the sum output of the second adder in response to the re-normalized signal. And, the fourth multiplexers selectively outputs the output of the third multiplexer or the maximum scale factor in response to the output of the logic unit. The ACS device has an accumulated path matrix value with 6 bits and its uppermost scale factor is 63.
申请公布号 KR100442235(B1) 申请公布日期 2004.10.22
申请号 KR19970007722 申请日期 1997.03.07
申请人 LG ELECTRONICS INC. 发明人 LEE, JIN GYU
分类号 H03M13/00;(IPC1-7):H03M13/00 主分类号 H03M13/00
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