| 发明名称 |
METHOD AND SYSTEM OF JITTER COMPENSATION |
| 摘要 |
<p>The present invention relates to sigma-delta modulators, SigmaDelta modulators, and phase locked loops. Especially, it relates to jitter compensation in SigmaDelta-controlled fractional-N frequency synthesizers. Jitter compensation is introduced by means of a variable delay line.</p> |
| 申请公布号 |
WO2004088846(A1) |
申请公布日期 |
2004.10.14 |
| 申请号 |
WO2004SE00369 |
申请日期 |
2004.03.12 |
| 申请人 |
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL);EIKENBROEK, JOHANNES WILHELMUS THEODORUS |
发明人 |
EIKENBROEK, JOHANNES WILHELMUS THEODORUS |
| 分类号 |
H03L;H03L7/081;H03L7/197;(IPC1-7):H03L7/197 |
主分类号 |
H03L |
| 代理机构 |
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