发明名称 Content addressable memory (CAM) devices having CAM array blocks therein that conserve bit line power during staged compare operations
摘要 Content addressable memory (CAM) devices include at least one CAM array that is configured to identify at least one match between a new search word and entries therein by performing a staged compare operation that conserves bit line power by initially floating at least some of a plurality of bit lines in said CAM array and then driving the at least some of a plurality of bit lines with second bits of the new search word in response to detecting at least one partial match between first bits of the new search word and the entries in said CAM array.
申请公布号 US6804134(B1) 申请公布日期 2004.10.12
申请号 US20030410569 申请日期 2003.04.09
申请人 INTEGRATED DEVICE TECHNOLOGY, INC. 发明人 PROEBSTING ROBERT J.;CHU SCOTT YU-FAN;PARK KEE
分类号 G11C15/00;(IPC1-7):G11C15/00 主分类号 G11C15/00
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