VOLTAGE DROP CIRCUIT FOR TESTING CHIP, ESPECIALLY INCLUDING FLOATING PREVENTION CIRCUIT TO PREVENT ERRONEOUS OPERATION AND CURRENT CONSUMPTION

摘要

PURPOSE: A voltage drop circuit for testing a chip is provided to reduce current consumption during stop mode of the chip by preventing a corresponding node from floating. CONSTITUTION: A circuit for lowering a voltage for testing chips includes a voltage drop circuit, a test signal output circuit, a floating prevention circuit, and a current consumption prevention circuit. The voltage drop circuit(210) lowers a predetermined high voltage signal inputted for a test mode to a predetermined voltage level. The test signal output circuit(220) provides a test signal into a chip in response to the output of the voltage drop circuit. The floating prevention circuit(230) prevents a corresponding node from floating during normal operation of the chip. The current consumption prevention circuit(240) blocks a current flow into the circuit during a stop mode of the chip.