| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which an operation mode can be set after all commands are finished when the operation mode is set by a combination of legal commands. SOLUTION: A mode set entry circuit 31 outputs a latch timing signal LAT1 with timing at which a combination of a plurality of commands is detected. An address latch 1 circuit 32 holds mode indicating data indicating an operation mode in accordance with the latch timing signal LAT1 and outputs it. Next, an address latch 2 circuit 33 holds mode indicating data outputted by the address latch 1 circuit 32 and outputs it in accordance with a latch timing signal LA2 indicating finish of the command in combination of the plurality of commands. COPYRIGHT: (C)2005,JPO&NCIPI
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