发明名称 CLOCK BOARD DUPLEXING METHOD, CONCERNED WITH PREVENTING CLOCK FOR BEING BROKEN
摘要 PURPOSE: A clock board duplexing method is provided to realize a prevention circuit for receiving information on other board from a standby board as a logic circuit when an active board is mounted or dismounted, or a reset is generated while duplexing a clock board, thereby preventing a clock for being broken. CONSTITUTION: When power is on(ST11), each board confirms whether a self state is normal(ST12). If so, each board decides whether a self mounting signal is normal(ST13). If so, each board reads a self slot ID, and confirms whether the read ID value is '0'(ST14). If the slot ID is '1', each board applies a delay(ST15). If the slot ID is '0', each board checks whether other board is in active state or in standby state(ST16). If the other board is in the standby state, each board applies a self state to an active mode(ST17). If the other board is in the active state, each board maintains a self standby mode(ST18).
申请公布号 KR20040083870(A) 申请公布日期 2004.10.06
申请号 KR20030018555 申请日期 2003.03.25
申请人 UTSTARCOM KOREA LIMITED 发明人 BAE, EUN HYE
分类号 H04B1/69;G06F1/04;G06F1/24;G06F11/20;H04B1/707;H04B1/74;H04J3/06;(IPC1-7):H04B1/69 主分类号 H04B1/69
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