发明名称 |
Method of manufacturing nano transistors |
摘要 |
The present invention relates to a method of manufacturing a nano transistor. The present invention manufactures the nano transistor without changing a conventional method of forming the nano transistor formed on a SOI substrate. Further, the present invention includes forming a N well and a P well at giving regions of an underlying silicon substrate so that a given voltage can be individually applied to a NMOS transistor and a PMOS transistor. Therefore, the present invention can control the threshold voltage to prevent an increase of the leakage current.
|
申请公布号 |
US6797629(B2) |
申请公布日期 |
2004.09.28 |
申请号 |
US20020185104 |
申请日期 |
2002.06.27 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
JANG MOON GYU;CHO WON JU;LEE SEONG JAE;PARK KYOUNG WAN |
分类号 |
H01L21/336;H01L21/84;H01L27/12;H01L29/786;(IPC1-7):H01L21/302 |
主分类号 |
H01L21/336 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|