POWER AND BIT LOADING ALLOCATION IN A COMMUNICATION SYSTEM WITH A PLURALITY OF CHANNELS

摘要

The present invention is concerned with optimising bit loading and power allocation in a communication system for transferring data between a transmitter and a receiver over a plurality of channels. The system comprises modulation circuitry having a plurality of different modulation alphabets thereby providing a set of possible bit loading sequences. The system also has circuitry for determining the power to be allocated for each bit loading sequence based on minimising the error rate and circuitry for selecting the bit loading sequence with the lowest bit error rate.