Adiabatic charging register circuit

摘要

An adiabatic charging register circuit including a plurality of n-channel MOSFET's and plurality of p-channel MOSFET's, is operated by a clock signal which has a gradually rising and an gradually falling waveform generated by using a charge recycle power source in which charge supplied to a load is at lease partially collected to said charge recycle power source, and following inequality is satisfied;wherein VTN is threshold of an n-channel MOSFET, VTP is threshold of a p-channel MOSFET, and VDD is output voltage of said charge recycle power source.