发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, ITS FABRICATION METHOD, SEMICONDUCTOR INTEGRATED CIRCUIT AND SYSTEM, IN WHICH AREA OF CELL MEMORY TRANSISTOR IS REDUCED
摘要 PURPOSE: A nonvolatile semiconductor memory device and its fabrication method, and a semiconductor integrated circuit and system are provided which reduces an area of a memory cell transistor and improve reliability of operation. CONSTITUTION: A number of word lines(WL1 - WL32) are arranged in a row direction. A bit line is arranged in a column direction orthogonal to the word line. A memory cell transistor is arranged in the column direction, and has a charge accumulation layer whose charge accumulation state is controlled by one of the plurality of word lines. A plurality of first selection transistors are arranged adjacently to the column direction on one side of the memory cell transistor, and selects the memory cell transistor. And the first selection gate lines(SGD1,SGD2,SGS1,SGS2) are connected to each gate of the first selection transistors.
申请公布号 KR20040074142(A) 申请公布日期 2004.08.23
申请号 KR20030009071 申请日期 2003.02.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ICHIGE MASAYUKI;HASHIMOTO KOJI;KUJI TATSUAKI;MORI SEIICHI;SHIROTA RIICHIRO;TAKEUCHI YUJI;SAKUI KOJI
分类号 G11C16/00;G06K17/00;G06K19/077;G11C11/34;G11C14/00;G11C16/02;G11C16/04;G11C16/06;H01L21/82;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/00 主分类号 G11C16/00
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