发明名称 SEMICONDUCTOR PACKAGE WITH PATTERN LEAD AND FABRICATING METHOD THEREOF
摘要 <p>PURPOSE: A semiconductor package with a pattern lead is provided to solve a problem caused by a bonding wire by forming an insulation outer sealing part in the outside of a semiconductor chip attached to a substrate and by electrically connecting an electrode pad of the chip with a substrate pad of the substrate by a pattern lead. CONSTITUTION: A plurality of electrode pads(12) are formed on the semiconductor chip(10). An insulating passivation layer is formed on the semiconductor chip except the electrode pad. The lower surface of the semiconductor chip is attached to the upper surface of the substrate(20). A plurality of substrate pads(21) are formed in a position adjacent to the attached semiconductor chip. The first outer sealing part for insulation is formed on the outer circumference of the chip including the edge of the upper surface of the chip. The first pattern lead connects the electrode pad of the chip with the substrate pad of the substrate corresponding to the electrode pad, formed on the semiconductor chip, the outer sealing part(40) and the substrate. Epoxy molding compound(60) seals the semiconductor chip attached to the upper surface of the substrate, the substrate pad and the first pattern lead. An outer connection terminal is electrically connected to the substrate pad, formed on the lower surface of the substrate.</p>
申请公布号 KR20040071960(A) 申请公布日期 2004.08.16
申请号 KR20030007882 申请日期 2003.02.07
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, SEONG DAE;KIM, SANG JUN;LEE, JU HYEONG
分类号 H01L23/48;H01L21/44;H01L21/60;H01L23/31;H01L23/495;H01L23/498;H01L23/538;(IPC1-7):H01L23/48 主分类号 H01L23/48
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