发明名称 Image packet communications system
摘要 In an image packet communications system, in a transmitter (101) side, a transmission clock (CLK1) is generated subordinately synchronized to a reference clock, and based on the transmission clock (CLK1), a transmission standard signal (FLM1) is generated as synchronous with the reference clock, so that a packet generator (104) generates image packets based on the timing of the transmission clock (CLK1) with reference to the transmission standard signal (FLM1), with image packet headers attached thereto. Then, in a receiver (105) side, a reception clock (CLK2) is generated subordinately synchronized to the reference clock, so that the reception clock (CLK2) is synchronized with the transmission clock (CLK1). A packet receiver (107) separates the image packet headers from the image packets, and the buffer controller (109) generates a reception standard signal (FLM2) with reference to the image packet headers based on the reception clock (CLK2), thereby controlling the writing and reading operation of the image packets to and from a buffer group (108). Thus, the transmitter and receiver ends can be stably synchronized, despite occurrence of errors or packet losses, with simple configuration. <IMAGE>
申请公布号 EP0921703(B1) 申请公布日期 2004.07.28
申请号 EP19980118885 申请日期 1998.10.06
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 HIGASHIDA, MASAAKI
分类号 H04N7/00;H04N7/10;H04N21/236;H04N21/438;H04Q11/04 主分类号 H04N7/00
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