发明名称 |
Semiconductor integrated circuit device and a method of manufacturing the same |
摘要 |
This invention is for improving filling properties between vertical MISFETs constituting a SRAM memory cell. Upon formation of vertical MISFETs over horizontal drive MISFETs and transfer MISFETs, they are disposed with a narrow pitch in the Y direction and a wide pitch in the X direction. After a first insulating film (O3-TEOS) having good coverage is disposed over a columnar laminates having a lower semiconductor layer, an intermediate semiconductor layer, an upper semiconductor layer and a silicon nitride film and a gate electrode formed over the side walls of the laminates via a gate insulating film to completely fill a narrow pitch space, a second insulating film (HDP silicon oxide film) is deposited over the first insulating film, resulting in an improvement in the filling properties even in a narrow pitch portion between the vertical MISFETs having a high aspect ratio.
|
申请公布号 |
US2004140502(A1) |
申请公布日期 |
2004.07.22 |
申请号 |
US20040756419 |
申请日期 |
2004.01.14 |
申请人 |
MURATA TATSUNORI;NAKAMURA TAKAHIRO;SUZUKI YASUMICHI |
发明人 |
MURATA TATSUNORI;NAKAMURA TAKAHIRO;SUZUKI YASUMICHI |
分类号 |
H01L23/522;G11C11/412;H01L21/316;H01L21/768;H01L21/8234;H01L21/8244;H01L27/088;H01L27/11;H01L29/76;(IPC1-7):H01L29/76 |
主分类号 |
H01L23/522 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|