摘要 |
A method and apparatus for synchronizing actions of two circuits or two parts of one circuit where each circuit utilizes a different clock signal are presented. In some embodiments, more than one clock signal are derived from a master clock signal and run at the same frequency but have an unknown or variable phase difference. Some aspects of the invention solve the problem of coupling two clocked circuits where synchronization is required to properly read or sample a signal from a data line connecting the two circuits. In some embodiments, an error window is defined during which sampling is suppressed, for example to avoid sampling during data transitions. One embodiment involves time shifting a pseudo-signal to generate two time-shifted signals and then defining the error window as the time during which the two time-shifted signals differ from one another.
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