发明名称 SINGLE ENDED CLOCK SIGNAL GENERATOR HAVING A DIFFERENTIAL OUTPUT
摘要 Embodiments of the present invention provide for generating asampled differential pattern signal with reduced jitter. In one embodimentof the present invention, a seed frequency generator provides a differentialseed frequency signal. The differential seed frequency signal is converted to a single ended seed frequency signal by a differential-to-single endedconverter. The pattern generation logic utilizes the single end seedfrequency signal to generate single ended pattern signals. Single ended-to-differential samplers then generate a sampled differential pattern signal by sampling the single ended pattern signal according to the differential seedfrequency signal.
申请公布号 WO2004059845(A2) 申请公布日期 2004.07.15
申请号 WO2003US41471 申请日期 2003.12.18
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 RICHMOND, GREG;AKYILDIZ, AHMET;SHKIDT, ALEX
分类号 G05F1/04;H03K3/00;H03K5/151;H03L 主分类号 G05F1/04
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