| 摘要 |
PURPOSE: A method for manufacturing a merged DRAM and logic device is provided to increase capacitance by enhancing the surface area of a storage node using repeat growing of a silicon epitaxial layer with facet. CONSTITUTION: An oxide layer and a nitride layer are sequentially formed on a substrate(21). A hole is formed to expose the substrate by patterning the nitride and oxide layer. A silicon epitaxial layer having facet is grown on the resultant structure. A thermal oxide layer is grown on the epitaxial layer and selectively etched to remain on the facet. The growing of the silicon epitaxial layer is repeatedly performed, thereby forming a storage node(26a). The thermal oxide layer on the facet is removed. A gate oxide layer(28) as a dielectric film and a gate conductive layer(29) as a plate electrode are then formed on the resultant structure.
|
