发明名称 |
Stack gate electrode suppressed with interface-reaction and method for fabricating semiconductor device having the same |
摘要 |
The present invention is related to a stack gate electrode capable of suppressing a formation of a non-uniform silicide layer at an interface between a polysilicon layer and a metal layer during a selective oxidation process and a thermal process both being performed after a gate patterning process and a method for fabricating a semiconductor device including the same. The stack gate electrode includes: a silicon layer; a reaction prevention layer formed on the silicon layer, wherein the reaction prevention layer containing nitrogen and silicon has a surface density of nitrogen above about 1x10<15>/cm<2>; and a metal layer formed on the reaction prevention layer.
|
申请公布号 |
US2004124460(A1) |
申请公布日期 |
2004.07.01 |
申请号 |
US20030616302 |
申请日期 |
2003.07.10 |
申请人 |
LIM KWAN-YONG;CHO HEUNG-JAE;LEE JUNG-HO |
发明人 |
LIM KWAN-YONG;CHO HEUNG-JAE;LEE JUNG-HO |
分类号 |
H01L21/28;H01L21/318;H01L21/324;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L29/788 |
主分类号 |
H01L21/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|