Microprocessor with cache memory and secondary memory, and method for programming such a microprocessor

摘要

A microprocessor with a cache memory facility, a secondary memory facility and an address comparator for directing only access addresses at one side of a threshold to cache memory, and having control code that has been moved to said one side e.g. through linker directives, and a data processing system comprising such microprocessor embedded, and to a method for programming such microprocessor <??>A microprocessor has a processing facility, a cache memory facility, a secondary memory facility, an interconnection facility for linking the other facilities recited and a control facility for selectively effecting memory accesses on the cache memory facility or on the secondary memory facility as being based on a memory access content. <??>In particular, the control facility comprises a single address comparator for containing a discrimination threshold value, for thereby directing access addresses at one side of the threshold to the cache memory whilst directing all other access addresses to the secondary memory facility. The microprocessor furthermore comprises inner loop control code that through linker directives has been moved to the one side of the threshold. <IMAGE>