JUNCTION FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

摘要

PROBLEM TO BE SOLVED: To reduce on-state resistance and ensure high breakdown voltage while keeping an allowable range of variance of gate concentration of a JFET in every process. SOLUTION: After impurities are injected into an area with a depth of 1 or 2 or more in a p-type Si substrate 1, thermal diffusion is generated and an n-type impurity layer 2 is formed as an extension drain area. Therefore, the drain concentration of the n-type impurity layer 2 as the extension drain area becomes uniform independent of depth, and a limit of the gate concentration in the JFET is relieved, so that on-state resistance can be reduced and high breakdown voltage be also ensured while an allowable range of variance of gate concentration in the JFET in every process is kept. COPYRIGHT: (C)2004,JPO