发明名称 METHOD FOR FORMING RESIST PATTERN AND HEAT-TREATING APPARATUS
摘要 PROBLEM TO BE SOLVED: To reduce size variance in hole size reduction quantity in a process of reducing a resist hole pattern through a heat treatment. SOLUTION: In a process of heating a substrate where a resist pattern is formed, a heat-treatment temperature is set again according to a result T obtained by measuring the temperature of a heat-treating apparatus so that the quantity of variation in pattern size due to a heat treatment reaches a desired value in the middle of the heat treatment. The heating temperature may be set again by blocks 20A, 20B, and 20C by using a heat-treating apparatus 18 comprising the blocks 20A, 20B, and 20C each equipped with a temperature control mechanism. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004172492(A) 申请公布日期 2004.06.17
申请号 JP20020338482 申请日期 2002.11.21
申请人 ELPIDA MEMORY INC 发明人 YOSHINO HIROSHI
分类号 G03F7/40;A21B1/22;F27D11/00;H01L21/027;H01L21/308;(IPC1-7):H01L21/027 主分类号 G03F7/40
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