发明名称 PROCESSOR SIMULATOR
摘要 PROBLEM TO BE SOLVED: To reduce an imitating scale, and to shorten a processing time in a system of a host processor imitating a target processor. SOLUTION: When checkpoint execution which means a hardware resource update is performed in processing after code conversion, a checkpoint detecting part for detecting the checkpoint execution is provided, and the processing is performed by converted the code (S6) while the execution of the checkpoint is performed. When the host processor detects unexpected exception processing, processing (S8) for restoring the checkpoint immediately before the detected point is performed. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004157642(A) 申请公布日期 2004.06.03
申请号 JP20020320860 申请日期 2002.11.05
申请人 MITSUBISHI ELECTRIC CORP 发明人 NISHIKAWA KOJI
分类号 G06F9/455;(IPC1-7):G06F9/455 主分类号 G06F9/455
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