发明名称 Slew-rate control system for synchronous dynamic random access memory, changes output data or transition speed based on signal which shows variation in electrical potential difference
摘要 Electrical potential difference of two power supply sources are sampled at a predetermined time and a signal is generated which describes electrical-potential difference variation. The change of transition speed or output data of output buffer circuit (4) is performed according to generated signal.
申请公布号 DE10346945(A1) 申请公布日期 2004.05.27
申请号 DE20031046945 申请日期 2003.10.09
申请人 ELPIDA MEMORY, INC. 发明人 SHIBATA, TOMOYUKI;OISHI, KANJI
分类号 H03K5/12;G11C11/409;H03K17/687;H03K19/003;H03K19/0175;(IPC1-7):H03K19/003 主分类号 H03K5/12
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