发明名称 CPU, information processing device including the CPU, and controlling method of CPU
摘要 A CPU includes a bus interface, a control unit, an instruction cache, a data cache, a secondary cache, an instruction decoder, an arithmetic unit, and registers. When operations can be performed only with the cache, the CPU inhibits access to external memory and stops power supply to the external memory. With this arrangement, by performing operations in the CPU without using the external memory, it is possible to realize a speedy processing and to stop power supply to the external memory, thus allowing for reduction in power consumption.
申请公布号 US2004103253(A1) 申请公布日期 2004.05.27
申请号 US20030719814 申请日期 2003.11.21
申请人 KAMEI NAOYUKI;YOSHIMURA SOHICHI;NISHIMURA MICHIAKI;MIZUYAMA YOSHIO;KINOSHITA HIROKI;MINAMI TAKAHIRO 发明人 KAMEI NAOYUKI;YOSHIMURA SOHICHI;NISHIMURA MICHIAKI;MIZUYAMA YOSHIO;KINOSHITA HIROKI;MINAMI TAKAHIRO
分类号 G06F12/08;G06F1/26;G06F1/32;G06F9/30;G06F12/00;G06F12/12;(IPC1-7):G06F12/00 主分类号 G06F12/08
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