| 摘要 |
A digital filter includes a number of coefficient generators that are clocked by a clock having a frequency including an undesired component. The coefficient generators, which each have a number of states, are communicatively coupled to multipliers that receive incoming signals and multiply the incoming signals by coefficients produced by the coefficient generators. Based on the magnitude of the undesired coefficient, certain states of the coefficient generators may be repeated or skipped to adjust the time and frequency domain of the output from the digital filter.
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