VOLTAGE GENERATING CIRCUIT

摘要

The power consumption must be reduced in liquid crystal display devices. A drive voltage generating circuit (201) comprises a clock signal frequency-divider circuit (204) that performs, with respect to clock signals, such a signal processing that does not divide the frequency of externally inputted clock signals (SG22) during a display interval (T13) in which to perform a basic display for normally displaying radio wave reception condition of a mobile telephone and the like on a liquid crystal display panel but does divide that frequency, based on a predetermined criterion, during intervals other than the display interval (T13); and a booster circuit (202,203) uses the clock signals (SG13), the frequency of which has been divided by the clock signal frequency-divider circuit (204), to generate a predetermined voltage for performing that basic display.