发明名称 DRAM CELL STRUCTURE AND MANUFACTURING METHOD THEREOF
摘要 PURPOSE: A DRAM cell structure and a method for manufacturing the same are provided to be capable of reducing contact resistance of a bit line and increasing the number of chips per unit area. CONSTITUTION: A cell region(11) is diagonally formed against a bit line(14). Two FG lines(12) are overlapped to the cell region. A bit line contact(13) is formed at the overlapped region between the cell region and the bit line. A capacitor contact(15) is formed at oval edge portions of the cell region being not contact with adjacent FG line.
申请公布号 KR20040037841(A) 申请公布日期 2004.05.08
申请号 KR20020066507 申请日期 2002.10.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, GYO SEONG
分类号 H01L27/108;(IPC1-7):H01L27/108 主分类号 H01L27/108
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