| 摘要 |
PURPOSE: A semiconductor memory device is provided to set a proper timing margin of an internal control signal and also enables to generate timing of a high speed internal control signal. CONSTITUTION: The semiconductor memory device(1) comprises the first dummy cell array(2), the second dummy cell array(3), a memory cell array(4), a decoder column(5), an input/output latch circuit(6) and a timing control circuit(7). The semiconductor memory device is a SRAM and uses a self time method. The first dummy cell array is connected to a pair of dummy bit lines installed at the farthest position from the decoder column as to the memory cell array. The second dummy cell array(3) is connected to a pair of dummy bit lines installed at the closet position to the decoder column as to the memory cell array.
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