发明名称 Flash EEPROM with function bit by bit erasing
摘要 A multi-bit split-gate (MSG) flash cell with multi-shared source/drain, a method of making and a method of programming the same are disclosed. Furthermore, a method of bit-by-bit erasing, in addition to page erasing, of a plurality of cells of two or more is disclosed through the application of a positive voltage forced onto the control gate of the unselected cell. Thus, by providing the bit-by-bit erasing flexibility, the bit alterability is enhanced. The MSG is formed with N+1 stacked gates comprising floating gates and control gates, separated by N select gates, all sharing the same source/drain between a pair of bit lines. The programming, that is, writing of the plurality of N+1 bits is accomplished also bit by bit where the programmed bits are selected by word line, bit line and control gate. The read operation is similar to the write operation. Thus, it is disclosed here that a plurality of N+1 bits or cells, where N is any integer, can be formed between two bit lines and along the same word line and also be programmed with enhanced bit alterability.
申请公布号 US2004084732(A1) 申请公布日期 2004.05.06
申请号 US20030686794 申请日期 2003.10.16
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 HSIEH CHIA-TA
分类号 H01L27/115;(IPC1-7):H01L29/94;H01L21/82;H01L31/062 主分类号 H01L27/115
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