发明名称 |
Binary decoders in electronic integrated circuits |
摘要 |
An improved binary decoder incorporating a selection circuit that activates a selected output corresponding to a input binary value, and a deselecting circuit coupled to each output that deactivates all other outputs when the selected output is activated. The deselecting circuit arrangement has a single input connected to the selected output and a plurality of outputs each of which is connected to one of the remaining outputs and forces them to the inactive state whenever the selected output is activated.
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申请公布号 |
US2004085230(A1) |
申请公布日期 |
2004.05.06 |
申请号 |
US20030615601 |
申请日期 |
2003.07.07 |
申请人 |
STMICROELECTRONICS PVT. LTD. |
发明人 |
LAL ABHISHEK |
分类号 |
H03M7/16;(IPC1-7):H03M7/00 |
主分类号 |
H03M7/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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