发明名称 Method, apparatus, and system for improving memory access speed
摘要 According to one embodiment of the invention, an apparatus is provided which includes a high speed memory unit to store data received from an external memory device. The high speed memory unit has faster memory access speed compared to the external memory device. The apparatus further includes a memory controller coupled to the high speed memory unit to control access to the high speed memory unit and an external bus interface (EBIF) unit coupled to the memory controller and to an external bus to receive data from the external memory device via the external bus and transfer the data received from the external memory device to the high speed memory unit via the memory controller. In one embodiment, the EBIF unit, based on a memory request issued by a host device, generates a consecutive data read request to read a block of data from the external memory device and store the block of data read in the high speed memory unit. In response to a subsequent read request issued by the host device that hits the high speed memory unit, the requested data is retrieved from the high speed memory unit for the host device.
申请公布号 US2004083344(A1) 申请公布日期 2004.04.29
申请号 US20020279500 申请日期 2002.10.24
申请人 WATANABE HIDEKAZU 发明人 WATANABE HIDEKAZU
分类号 G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/08
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