| 摘要 |
An enhanced digital signal driver circuit that allows the driving of digital signals with a larger voltage swing than that which is typically allowed by the associated IC technology is provided. The driver circuit employs PFETs and NFETs that clip the voltage present across both the drain-to-source and gate-to-source junctions of a driving PFET and a driving NFET of the driver circuit. The clipping PFETs and NFETs ensure that the drain-to-source and gate-to-source voltages of all of the FETs of the driver circuit are within the voltage design limits of the associated IC technology when the imposed power supply and digital signal voltages are substantially higher than those for which the associated IC technology was designed.
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