FLASH MEMORY DEVICE AND METHOD OF ERASING

摘要

A non-volatile memory device includes an improved method for erasing a block of stack-gate single transistor flash memory cells. The memory performs an efficient and controllable mode of programming, referred to as block convergence. During an erase operation, one or more electrical erase pulses of fixed number, duration and voltage waveform are appleid to memory cells in an adressable block of the memory device array. The erase pulse(s) fully erase all bits in the block. A block of convergence operation is applied simultaneously to all cells in the block. The block convergence operation brings a threshold voltage of cells, which may have become over-erased during the erase operation, to a controlled level. A reverse-bias pulse, capable of inducing band-to-band tunnelling across one juction in the structure of the flash memory cells, is applied to a first junction. The other junction receives either a reverse bias or floating potential. The memory can implement several biasing schemes while performing the block convergence operation.