发明名称 |
Electronic package with offset reference plane cutout |
摘要 |
An electronic package, such as a ball grid array ("BGA") package, includes a high speed signal trace formed at a conductive layer and a corresponding reference plane formed at another conductive layer. The reference plane includes a cutout region formed therein; the cutout region is positioned over the signal solder ball to which the high speed signal trace is coupled. The lateral center point of the cutout region is offset relative to the lateral center point of the signal solder ball. The offset configuration reduces the capacitance between the signal solder ball and the reference plane and improves the high frequency transmission characteristics of the electronic package.
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申请公布号 |
US6713853(B1) |
申请公布日期 |
2004.03.30 |
申请号 |
US20020202322 |
申请日期 |
2002.07.23 |
申请人 |
APPLIED MICRO CIRCUITS CORPORATION |
发明人 |
FAZELPOUR SIAMAK;FLEURY MICHEL;PATTERSON MARK |
分类号 |
H01L23/498;H01L23/66;H05K1/02;H05K3/34;(IPC1-7):H01L23/02 |
主分类号 |
H01L23/498 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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