发明名称 SEMICONDUCTOR DEVICE FABRICATING PROCESS
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor fabricating process for excluding certainly surges entering a protecting MIS transistor with a fundamental structure and a process that are held in common between the protecting MIS transistor and the other MIS transistor. SOLUTION: A mask for forming a high concentration source and drain region (7a, 7b) and then shadows of a gate electrode (4) and side wall (5) are utilized to control an implantation angle, so that high concentration well regions (10a, 10b) are formed by an ion implantation. In processes for forming the high concentration source and drain regions (7a, 7b), as the high concentration well regions (10a, 10b) can be formed, the protecting MIS transistor can be formed compatibly with preventing increase in cost and deterioration in transistor characteristics without increase in lithography processes and in the number of masks. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004079813(A) 申请公布日期 2004.03.11
申请号 JP20020238573 申请日期 2002.08.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIYATA RIE
分类号 H01L27/04;H01L21/265;H01L21/266;H01L21/822;H01L21/8234;H01L27/06;H01L27/088;H01L29/78;(IPC1-7):H01L27/06;H01L21/823 主分类号 H01L27/04
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