FLIP FLOP CAPABLE OF REDUCING LOAD AS TO CLOCK SIGNAL LINE

摘要

PURPOSE: A flip flop is provided to improve an operation speed by reducing load as to a clock signal line. CONSTITUTION: According to the flip flop having a master latch(60) and a slave latch(80), a latch operation of the slave latch is controlled by comparing an output signal of the master latch with an output signal of the slave latch. A master latch gate(50) receives an input signal of the flip flop under the control of a clock signal and an inverted clock signal. The master latch receives an output signal of the master latch gate under the control of the clock signal and the inverted clock signal. A slave latch gate(70) receives an output signal of the master latch under the control of the clock signal and the inverted clock signal. The slave latch latches an output signal of the slave latch gate under the control of a slave latch control signal and an inverted slave latch control signal. And a comparator(90) receives the output signal of the master latch and its inverted signal and the output signal of the slave latch and its inverted signal, and generates the slave latch control signal and the inverted slave latch control signal.