发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To reduce power consumption by suppressing transition of data while suppressing increase of the chip area due to addition of a circuit. SOLUTION: Input section 110 of a second logic circuit 140 is constituted of an inverter while separating the power supply thereof from a processing section 120 and connected with an output fixing signal s150 being generated from an output fixing signal generating means 150. When the outputs s111o-s116o at the input section 110 is fixed to logic "0", the output fixing signal s150 is set at logic "0" . Power consumption can be reduced by providing a means for fixing the data input while suppressing increase in the chip area due to addition of a circuit by dropping the output forcibly to logic "0" utilizing a pMOS in the inverter thereby suppressing transition of a nonoperating circuit. COPYRIGHT: (C)2004,JPO
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申请公布号 |
JP2004064247(A) |
申请公布日期 |
2004.02.26 |
申请号 |
JP20020217356 |
申请日期 |
2002.07.26 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
SUDO DAISAKU |
分类号 |
H01L21/822;H01L21/8238;H01L27/04;H01L27/092;H03K19/00;H03K19/0175;(IPC1-7):H03K19/00;H01L21/823;H03K19/017 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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