发明名称 Bit line pre-charge circuit of semiconductor memory device
摘要 A bit line pre-charge circuit of a semiconductor memory device includes a pre-charge circuit connected between a pair of bit lines for pre-charging the pair of bit lines in response to a pre-charge control signal and a pre-charge voltage transmitting circuit for transmitting a pre-charge voltage to the pre-charge circuit in response to the pre-charge control signal. A voltage drop in a pre-charge voltage generation line may be prevented when a short circuit is formed between a word line and a pair of bit lines, and current consumption during a standby operation of the semiconductor memory device may also be reduced, by preventing current from flowing from the pair of bit lines to the pre-charge voltage generation line.
申请公布号 US2004027897(A1) 申请公布日期 2004.02.12
申请号 US20030633562 申请日期 2003.08.05
申请人 JOO JAE-HOON;LEE JIN-SEOK;KANG SANG-SEOK;LEE KYU-CHAN;KWAK BYUNG-HEON;KIM BYUNG-CHUL 发明人 JOO JAE-HOON;LEE JIN-SEOK;KANG SANG-SEOK;LEE KYU-CHAN;KWAK BYUNG-HEON;KIM BYUNG-CHUL
分类号 H01L27/108;G11C7/12;G11C11/401;G11C11/409;H01L21/8242;(IPC1-7):G11C7/00 主分类号 H01L27/108
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