发明名称 Method for detecting and correcting failures in a memory system
摘要 According to one embodiment, a method is disclosed. The method includes interleaving a first error correction code with a second error correction code to generate a third error correction code that provides chip-kill capabilities for a memory system.
申请公布号 US6691276(B2) 申请公布日期 2004.02.10
申请号 US20010892066 申请日期 2001.06.25
申请人 INTEL CORPORATION 发明人 HOLMAN THOMAS J.
分类号 G06F11/10;G06F13/00;G11C29/00;H03M13/00;H03M13/27;H03M13/29;(IPC1-7):G06F11/10 主分类号 G06F11/10
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