| 摘要 |
PURPOSE: A method for forming a copper line of a semiconductor device is provided to be capable of removing the void or pit generated at the surface of a copper plating layer in order to improve the reliability, the yield, and the degree of integration of the semiconductor device. CONSTITUTION: An interlayer having a damascene pattern is formed at the upper portion of a substrate(10). A copper diffusion barrier conductive layer(18) and a seed layer(19) are sequentially formed along the upper surface of the resultant structure. The first copper plating layer(20a) is formed at the upper portion of the resultant structure by carrying out the first copper plating process. After a surface process is carried out at the first copper plating layer, the second copper plating layer(20b) is formed at the upper portion of the first copper plating layer by carrying out the second copper plating process. Then, a copper line is formed at the inner portion of the damascene pattern by carrying out a CMP(Chemical Mechanical Polishing) process.
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