Method for manufacturing a via hole of a semiconductor device

摘要

A lower barrier layer made of tantalum nitride (19) having a thickness of approximately 25nm is deposited by sputtering on an insulating film (17) inclusive of the sidewall surfaces and the bottom surfaces of a via hole (17a) and an upper-interconnect-forming groove (18a). The sputtering is performed under the conditions where approximately 10kW of DC source power is applied to a target. Thereafter, the DC source power is reduced to approximately 2kW, and approximately 200W of RF power is applied to a semiconductor substrate. Here, the lower barrier layer is subjected to a sputter-etching process employing argon gas at an etching amount of approximately 5nm, so that a part of the lower barrier layer deposited on the bottom surface of the via hole is at least partially deposited on the lower part of the sidewall surface of the via hole.