DRAM CELLS

摘要

PURPOSE: DRAM cells are provided, which are appropriate for minimizing differences between width and length of storage nodes, and for maximizing an interval between a bit line contact hole and a storage node contact hole adjacent to the bit line contact hole. CONSTITUTION: A device isolation area(3) confines an active region by being formed on a semiconductor substrate(1). The first and the second MOS transistors are formed on the active region and are connected serially. And the first and the second storage nodes are arranged on the semiconductor substrate having the first and the second MOS transistors. Each of the first and the second storage node is connected to the first impurity region acting as a source region of the first MOS transistor and to the second impurity region acting as a source region of the second MOS transistor. Central axes of the first and the second storage nodes pass through the first and the second points separated from centers of the first and the second impurity regions.