发明名称 Parity checking system and method for a display system
摘要 The integrity of signal connections in a display system, such as a projection television system or cellular phone, between a driver circuit and a display circuit having an LCD micro-display is checked using parity calculations. A first parity is calculated by the driver circuit using only the digital signals to be sent to the display circuit, and a second parity is calculated by the display circuit using both the digital signals and analog signals received from the driver circuit. The first and second parity calculations are done using exclusive OR logic gates. The analog signals received by the display circuit are compared to the common driving voltage for the micro-display to provide inputs, in addition to the digital signals received by the display circuit, for the second parity calculation. The first and second parity are compared to determine the existence of a fault condition, and power to the display is shut down if a fault condition exists.
申请公布号 US2004008192(A1) 申请公布日期 2004.01.15
申请号 US20020316654 申请日期 2002.12.10
申请人 WATERMAN JOHN KARL 发明人 WATERMAN JOHN KARL
分类号 G06F3/14;G09G3/20;G09G5/00;(IPC1-7):G09G5/00 主分类号 G06F3/14
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