发明名称 Semiconductor integrated circuit apparatus and fabrication method thereof
摘要 A semiconductor integrated circuit apparatus having a planar capacitor can use a plurality of source voltages therein. According to the semiconductor integrated circuit apparatus, it is possible to not only control thresholds of individual MOS transistors but also reduce the threshold voltage of the planar capacitor without any additional fabrication process. The semiconductor integrated circuit apparatus includes a p-channel memory transistor and a capacitor in a first n-type element region, an n-channel low-voltage MOS transistor in a second p-type element region, and an n-channel high-voltage MOS transistor in a third p-type element region. A channel region of the second MOS transistor is doped under a high density profile by using a p-type impurity element. At the same time, the p-type impurity element is imported in a capacitor region of the first element region under the substantially same profile.
申请公布号 US2004004246(A1) 申请公布日期 2004.01.08
申请号 US20030449930 申请日期 2003.06.03
申请人 FUJITSU LIMITED 发明人 ANEZAKI TORU
分类号 H01L27/04;H01L21/822;H01L21/8234;H01L21/8242;H01L27/06;H01L27/10;H01L27/105;H01L27/108;(IPC1-7):H01L29/788 主分类号 H01L27/04
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