发明名称 Scheduler for streaming vector processor
摘要 A method for scheduling a computation for execution on a computer with a number of interconnected functional units. The computation is representable by a data-flow graph with a number of nodes connected by edge. A loop-period of the computation is calculated (104) and the nodes are scheduled for throughput (106) by assigning an execution cycle and a functional unit to each node of the data-flow graph. The scheduling of flexible nodes is adjusted to minimize the number of interconnections required in each execution cycle (110). The edges of the data-flow graph are allocated (122) to one or more of the interconnections between functional units. The scheduling method may be used, for example, to optimize the interconnection fabric design for an ASIC or as part of a compiler for a re-configurable streaming vector processor.
申请公布号 US2004003220(A1) 申请公布日期 2004.01.01
申请号 US20020184772 申请日期 2002.06.28
申请人 MAY PHILIP E.;MOAT KENT DONALD;ESSICK RAYMOND B.;CHIRICESCU SILVIU;LUCAS BRIAN GEOFFREY;NORRIS JAMES M.;SCHUETTE MICHAEL ALLEN;SAIDI ALI 发明人 MAY PHILIP E.;MOAT KENT DONALD;ESSICK RAYMOND B.;CHIRICESCU SILVIU;LUCAS BRIAN GEOFFREY;NORRIS JAMES M.;SCHUETTE MICHAEL ALLEN;SAIDI ALI
分类号 G06F9/45;(IPC1-7):G06F15/00;G06F9/44;G06F9/00;G06F7/38 主分类号 G06F9/45
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