发明名称 VIDEO SIGNAL DATA AND COMPOSITE SYNCHRONIZATION EXTRACTION CIRCUIT FOR ON-SCREEN DISPLAY
摘要 A composite synchroniza- tion extraction circuit is particu- larly suited for receiving compo- site video signals containing closed captioning data in raster scan line (21) by means of a sig- nal CMOS integrated circuit de- vice. A dual mode voltage clamp is realized in CMOS technology. The clamp includes temperature compensated current sources in the form of complementary cur- rent mirrors through which a clamped composite synchroniza- tion node is charged and dis- charged with the aid of a compar- ator, the output of which controls a transistor for charging the com- posite synchronization node. De- tected pulse amplitude is set by slicing (24, 25) the incoming pulse at the back porch level and then doubling the amplitude with an amplifier and comparing that level with the back porch level as derived from a sample-and- hold device. Frequency and phase synchronization is accomplished by a combination of frequency lock Loop and phase lock loop (27, 28) working in concert to generate a control voltage for a voltage controlled oscillator in a. flywheel mode. The voltage con- trolled oscillator (27) is not subject to noise in the incoming signal and provides a clean source of timing information for the cir- cuit.
申请公布号 CA2130822(C) 申请公布日期 2003.12.30
申请号 CA19932130822 申请日期 1993.02.26
申请人 EXTRATEK, INC.;EEG ENTERPRISES, INC. 发明人 BERMAN, ERIC B.;GANESAN, APPARAJAN;JORDEN, WILLIAM B.H.;MCLAUGHLIN, PHILIP T.;POSNER, WILLIAM H.
分类号 H03K5/007;H03K5/08;H04L7/10;H04L25/06;H04N5/08;H04N5/445;H04N7/035;(IPC1-7):H04L7/027 主分类号 H03K5/007
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